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Markdown edition

# CXMT prepares limited HBM3E production as yields remain constrained

> Reuters reports that CXMT plans limited HBM3E production despite low estimated yields.

By BIGCHANGE.AI Editorial

Published: 2026-10-28T23:02:38.569Z
Updated: 2026-10-28T23:02:38.569Z
Canonical: https://bigchange.ai/blog/cxmt-memory-yields

![Conceptual charcoal illustration of a semiconductor wafer resting in a circular protective carrier.](https://bigchange.ai/api/media/file/cxmt-wafer-v2.png)
AI-generated conceptual illustration by BIG CHANGE.

ChangXin Memory Technologies (CXMT) plans HBM3E production despite 20% to 30% yields, Reuters reported October 28. The estimate comes from two people familiar with the matter; CXMT did not respond to Reuters' request for comment.

## The big change

- Reuters reports CXMT plans limited HBM3E production despite low yields, as Chinese chipmakers face a memory shortage.
- Low yield leaves fewer usable chips from each production run, raising the cost burden per accepted unit. The reported percentage alone does not reveal how much memory CXMT can deliver.
- HBM supplies data to AI accelerators through a wide connection. Buyers need memory that works with their processors and packaging before samples can become usable system supply.

## Why accelerators need this memory

AI processors repeatedly move data between computation and memory. If data cannot arrive quickly enough, processing capacity can sit idle. [Micron’s explanation of HBM](https://www.micron.com/products/memory/hbm) describes vertically stacked DRAM dies connected by through-silicon vias, tiny electrical paths through the silicon. The stack uses a wide interface and sits close to the processor within the package, enabling many data transfers at once over short connections.

HBM3E is a generation of that memory architecture. It is not a complete accelerator: a system maker must integrate and qualify the memory with the processor and its packaging. Micron’s description explains the general design, not the specifications or performance of CXMT’s product.

## What low yield changes

Yield is the share of output that meets specification. A [US National Institute of Standards and Technology report](https://www.nist.gov/system/files/documents/director/planning/report07-2.pdf) describes testing, rework and scrap in semiconductor manufacturing. With fewer usable chips from a run, the manufacturer must spread production costs over fewer accepted units, unless it can recover or rework failed material. That affects the economics of supplying memory even before a buyer considers its price. The percentage alone cannot establish shipments without a production denominator.

The [Reuters report](https://uk.marketscreener.com/news/china-s-cxmt-to-start-advanced-ai-memory-production-despite-poor-yields-sources-say-ce785cd2d98cf321) says CXMT sent domestic chip designers samples and plans production within two months. One source told Reuters that the memory’s tested performance was closer to an earlier SK Hynix generation. Without published test conditions, that comparison cannot establish performance in a customer’s system.

In December 2024 the US [Bureau of Industry and Security announced controls](https://www.bis.gov/press-release/commerce-strengthens-export-controls-restrict-chinas-capability-produce-advanced-semiconductors-military) on high-bandwidth memory covering US-origin products and certain foreign-produced products subject to its rules. BIG CHANGE has not examined a CXMT chip or independently verified Reuters’ estimates.

BIG CHANGE has also reported on [Samsung and SK hynix's AI memory supply chain](https://bigchange.ai/blog/samsung-sk-hynix-ai-memory-ai-supply-chain), a related story about established suppliers.

## Sources

- [Reuters report on CXMT HBM3E](https://uk.marketscreener.com/news/china-s-cxmt-to-start-advanced-ai-memory-production-despite-poor-yields-sources-say-ce785cd2d98cf321) — Reuters attributes the production plan, yield estimate and performance comparison to unnamed sources.
- [US semiconductor export-control announcement](https://www.bis.gov/press-release/commerce-strengthens-export-controls-restrict-chinas-capability-produce-advanced-semiconductors-military) — The Bureau of Industry and Security describes its December 2024 controls on high-bandwidth memory.
- [Micron high-bandwidth memory overview](https://www.micron.com/products/memory/hbm) — Micron explains stacked memory, through-silicon vias and the processor connection.
- [NIST semiconductor measurement report](https://www.nist.gov/system/files/documents/director/planning/report07-2.pdf) — NIST describes semiconductor testing, yield, rework and scrap.